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DOC7707 bảng dữ liệu(PDF) 257 Page - List of Unclassifed Manufacturers

tên linh kiện DOC7707
Giải thích chi tiết về linh kiện  Microcontroller with 8/16K Bytes of ISP Flash and USB Controller
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DOC7707 bảng dữ liệu(HTML) 257 Page - List of Unclassifed Manufacturers

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257
7707F–AVR–11/10
AT90USB82/162
Notes:
1.
tWLRH is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
commands.
2.
tWLRH_CE is valid for the Chip Erase command.
25.7
Serial Downloading
Both the Flash and EEPROM memory arrays can be programmed using a serial programming
bus while RESET is pulled to GND. The serial programming interface consists of pins SCK, PDI
(input) and PDO (output). After RESET is set low, the Programming Enable instruction needs to
be executed first before program/erase operations can be executed. NOTE, in Table 25-14 on
page 257, the pin mapping for serial programming is listed. Not all packages use the SPI pins
dedicated for the internal Serial Peripheral Interface - SPI.
25.8
Serial Programming Pin Mapping
Figure 25-10. Serial Programming and Verify
(1)
tXLWL
XTAL1 Low to WR Low
0
ns
tXLPH
XTAL1 Low to PAGEL high
0
ns
tPLXH
PAGEL low to XTAL1 high
150
ns
tBVPH
BS1 Valid before PAGEL High
67
ns
tPHPL
PAGEL Pulse Width High
150
ns
tPLBX
BS1 Hold after PAGEL Low
67
ns
tWLBX
BS2/1 Hold after WR Low
67
ns
tPLWL
PAGEL Low to WR Low
67
ns
tBVWL
BS2/1 Valid to WR Low
67
ns
tWLWH
WR Pulse Width Low
150
ns
tWLRL
WR Low to RDY/BSY Low
0
1
μs
tWLRH
WR Low to RDY/BSY High
(1)
3.7
4.5
ms
tWLRH_CE
WR Low to RDY/BSY High for Chip Erase
(2)
7.5
9
ms
tXLOL
XTAL1 Low to OE Low
0
ns
tBVDV
BS1 Valid to DATA valid
0
250
ns
tOLDV
OE Low to DATA Valid
250
ns
tOHDZ
OE High to DATA Tri-stated
250
ns
Table 25-13. Parallel Programming Characteristics, V
CC = 5V ± 10% (Continued)
Symbol
Parameter
Min
Typ
Max
Units
Table 25-14. Pin Mapping Serial Programming
Symbol
Pins
I/O
Description
PDI
PB2
I
Serial Data in
PDO
PB3
O
Serial Data out
SCK
PB1
I
Serial Clock



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