DOC7707 datasheet(217/307 Pages) ETC1

217 / 307 page

217

7707F–AVR–11/10

AT90USB82/162

For IN Endpoint:

Set by hardware when the current bank is free, at the same time than TXIN.

Clear to send the FIFO data and to switch the bank. Setting by software has no effect.

• 6 - NAKINI - NAK IN Received Interrupt Flag

Set by hardware when a NAK handshake has been sent in response of a IN request from the

host. This triggers an USB interrupt if NAKINE is sent.

Shall be cleared by software. Setting by software has no effect.

• 5 - RWAL - Read/Write Allowed Flag

Set by hardware to signal:

- for an IN endpoint: the current bank is not full i.e. the firmware can push data into the FIFO,

- for an OUT endpoint: the current bank is not empty, i.e. the firmware can read data from the

FIFO.

The bit is never set if STALLRQ is set, or in case of error.

Cleared by hardware otherwise.

This bit shall not be used for the control endpoint.

• 4 - NAKOUTI - NAK OUT Received Interrupt Flag

Set by hardware when a NAK handshake has been sent in response of a OUT/PING request

from the host. This triggers an USB interrupt if NAKOUTE is sent.

Shall be cleared by software. Setting by software has no effect.

• 3 - RXSTPI - Received SETUP Interrupt Flag

Set by hardware to signal that the current bank contains a new valid SETUP packet. An inter-

rupt (EPINTx) is triggered (if enabled).

Shall be cleared by software to handshake the interrupt. Setting by software has no effect.

This bit is inactive (cleared) if the endpoint is an IN endpoint.

• 2 - RXOUTI / KILLBK - Received OUT Data Interrupt Flag

Set by hardware to signal that the current bank contains a new packet. An interrupt (EPINTx) is

triggered (if enabled).

Shall be cleared by software to handshake the interrupt. Setting by software has no effect.

Kill Bank IN Bit

Set this bit to kill the last written bank.

Cleared by hardware when the bank is killed. Clearing by software has no effect.

See page 205 for more details on the Abort.

• 1 - STALLEDI - STALLEDI Interrupt Flag

Set by hardware to signal that a STALL handshake has been sent, or that a CRC error has been

detected in a OUT isochronous endpoint.

Shall be cleared by software. Setting by software has no effect.

DOC7707 bảng dữ liệu(PDF) 217 Page - List of Unclassifed Manufacturers