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ADRF6850BCPZ-R7 bảng dữ liệu(PDF) 25 Page - Analog Devices

tên linh kiện ADRF6850BCPZ-R7
Giải thích chi tiết về linh kiện  100 MHz to 1000 MHz Integrated Broadband Receiver
PDF  36 Pages
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ADRF6850BCPZ-R7 bảng dữ liệu(HTML) 25 Page - Analog Devices

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ADRF6850
Rev. 0 | Page 25 of 36
within a suitable range to match the specification of the follow-
on device. This is accomplished by setting Register CR29, Bit 6,
to 0, and driving Pin 7, VOCM, with the requisite external bias
voltage.
Narrow-Band and Wideband Filter Mode
By default, the second-order low-pass filter in the output buffers
of the baseband output signal paths is selected, and the baseband
outputs are in narrow-band mode. By setting Register CR29,
Bits[5:4], this filter can be set to a cutoff frequency of 50 MHz,
43 MHz, 37 MHz, or 30 MHz. By setting Register CR29, Bit 3, to 1,
this filter is bypassed and wideband mode is selected.
Table 7. Baseband Filter Settings
CR29[5:4]
Filter Cutoff Frequency (MHz)
00
50
01
43
10
37
11
30
VGA Gain Mode Polarity
The polarity of the VGA gain is set by programming Bit 2 of
Register CR30. By setting Register CR30, Bit 2, to 0, a positive
gain slope is selected where VGAIN = 0 V sets the VGA gain to be 0
dB, and VGAIN = 1.5 V sets the VGA gain to be 60 dB. By setting
Register CR30, Bit 2, to 1, a negative gain slope is selected.



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