MCP2003 datasheet(15/34 Pages) MICROCHIP

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DS22230D-page 15

MCP2003/4/3A/4A

2.4

AC Specifications

AC CHARACTERISTICS

VBB = 6.0V to 27.0V; TA = -40°C to +125°C

Parameter

Sym

Min.

Typ.

Max.

Units

Test Conditions

Bus Interface – Constant Slope Time Parameters

Slope Rising and Falling Edges

tslope

3.5

—

22.5

µs

7.3V <= VBB <= 18V

Propagation Delay of

Transmitter

ttranspd

—

4.0

µs

ttranspd = max (ttranspdr or ttranspdf)

Propagation Delay of Receiver

trecpd

—

6.0

µs

trecpd = max (trecpdr or trecpdf)

Symmetry of Propagation

Delay of Receiver Rising Edge

w.r.t. Falling Edge

trecsym

-2.0

—

2.0

µs

trecsym = max (trecpdf – trecpdr)

RRXD 2.4

Ω TO VCC, CRXD 20 PF

Symmetry of Propagation

Delay of Transmitter Rising

Edge w.r.t. Falling Edge

ttrans-

sym

-2.0

—

2.0

µs

ttranssym = max (ttranspdf - ttranspdr)

Time to Sample of FAULT/TXE

for Bus Conflict Reporting

tfault

—

32.5

µs

tfault = max (ttranspd + tslope + trecpd)

Duty Cycle 1 @20.0 kbit/sec

.396

—

Cbus; Rbus conditions:

1nF; 1 k

Ω | 6.8 nF; 660Ω | 10 nF; 500Ω

THrec(max) = 0.744 x VBB,

THdom(max) = 0.581 x VBB,

VBB =7.0V – 18V; tbit = 50 µs

D1 = tbus_rec(min)/2 x tbit)

Duty Cycle 2 @20.0 kbit/sec

—

.581

Cbus; Rbus conditions:

1nF; 1 k

Ω | 6.8 nF; 660Ω | 10 nF; 500Ω

THrec(max) = 0.284 x VBB,

THdom(max) = 0.422 x VBB,

VBB =7.6V – 18V; tbit = 50 µs

D2 = tbus_rec(max)/2 x tbit)

Duty Cycle 3 @10.4 kbit/sec

.417

—

Cbus; Rbus conditions:

1nF; 1 k

Ω | 6.8 nF; 660Ω | 10 nF; 500Ω

THrec(max) = 0.778 x VBB,

THdom(max) = 0.616 x VBB,

VBB =7.0V – 18V; tbit = 96 µs

D3 = tbus_rec(min)/2 x tbit)

Duty Cycle 4 @10.4 kbit/sec

—

.590

Cbus; Rbus conditions:

1nF; 1 k

Ω | 6.8 nF; 660Ω | 10 nF; 500Ω

THrec(max) = 0.251 x VBB,

THdom(max) = 0.389 x VBB,

VBB =7.6V – 18V; tbit = 96 µs

D4 = tbus_rec(max)/2 x tbit)

Wake-up Timing

Bus Activity Debounce time

tBDB

µs

MCP2003/2004

125

µs

MCP2003A/2004A

Bus Activity to Vren on

tBACTVE

150

µs

MCP2003/2004

µs

MCP2003A/2004A

WAKE to Vren on

tWAKE

150

µs

Chip Select to Vren on

tCSOR

—

150

µs

Vren floating

Chip Select to Vren off

tCSPD

—

µs

Vren floating

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