DSPIC33FJMC202ESS datasheet(28/330 Pages) MICROCHIP

28 / 330 page

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

DS70283K-page 28

3.7.3.2

Data Space Write Saturation

In addition to adder/subtracter saturation, writes to data

space can also be saturated, but without affecting the

contents of the source accumulator. The data space

write saturation logic block accepts a 16-bit, 1.15 frac-

tional value from the round logic block as its input,

together with overflow status from the original source

(accumulator) and the 16-bit round adder. These inputs

are combined and used to select the appropriate 1.15

fractional value as output to write to data space

memory.

If the SATDW bit in the CORCON register is set, data

(after rounding or truncation) is tested for overflow and

adjusted accordingly:

• For input data greater than 0x007FFF, data writ-

ten to memory is forced to the maximum positive

1.15 value, 0x7FFF.

• For input data less than 0xFF8000, data written to

memory is forced to the maximum negative 1.15

value, 0x8000.

The Most Significant bit of the source (bit 39) is used to

determine the sign of the operand being tested.

If the SATDW bit in the CORCON register is not set, the

input data is always passed through unmodified under

all conditions.

3.7.4

BARREL SHIFTER

The barrel shifter can perform up to 16-bit arithmetic or

logic right shifts, or up to 16-bit left shifts in a single

cycle. The source can be either of the two DSP accu-

mulators or the X bus (to support multi-bit shifts of

The shifter requires a signed binary value to determine

both the magnitude (number of bits) and direction of the

shift operation. A positive value shifts the operand right.

A negative value shifts the operand left. A value of ‘0’

does not modify the operand.

The barrel shifter is 40 bits wide, thereby obtaining a

40-bit result for DSP shift operations and a 16-bit result

for MCU shift operations. Data from the X bus is pre-

sented to the barrel shifter between bit positions 16 and

31 for right shifts, and between bit positions 0 and 16

for left shifts.

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