AD9914PCBZ datasheet(13/48 Pages) AD

13 / 48 page

Data Sheet

AD9914

Rev. C | Page 13 of 48

Figure 10. Wideband SFDR at 1396.5 MHz,

SYSCLK = 3.5 GHz (SYSCLK PLL Bypassed)

Figure 11. Wideband SFDR vs. Normalized fOUT

SYSCLK = 3.5 GHz

Figure 12. Wideband SFDR vs. Normalized fOUT,

SYSCLK = 2.5 GHz to 3.5 GHz

Figure 13. Narrow-Band SFDR at 1396.5 MHz,

SYSCLK = 3.5 GHz (SYSCLK PLL Bypassed)

Figure 14. Absolute Phase Noise of REF CLK Source Driving AD9914

Rohde & Schwarz SMA100 Signal Generator at 3.5 GHz Buffered by Series

ADCLK925

Figure 15. Absolute Phase Noise Curves of DDS Output at 3.5 GHz Operation

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

START 0Hz

175MHz/DIV

STOP 1.75GHz

–80

0.05

0.10

0.15

0.40

0.35

0.30

0.25

0.20

fC/fS

–70

–60

–50

–40

–30

–20

–10

–80

0.05

0.10

0.15

0.40

0.35

0.30

0.25

0.20

fC/fS

–70

–60

–50

–40

–30

–20

–10

SYSCLK = 2.7GHz

SYSCLK = 2.8GHz

SYSCLK = 2.9GHz

SYSCLK = 3.0GHz

SYSCLK = 3.1GHz

SYSCLK = 3.2GHz

SYSCLK = 3.3GHz

SYSCLK = 3.4GHz

SYSCLK = 3.5GHz

SYSCLK = 1.5GHz

SYSCLK = 1.6GHz

SYSCLK = 1.7GHz

SYSCLK = 1.8GHz

SYSCLK = 1.9GHz

SYSCLK = 2.0GHz

SYSCLK = 2.1GHz

SYSCLK = 2.2GHz

SYSCLK = 2.3GHz

SYSCLK = 2.4GHz

SYSCLK = 2.5GHz

SYSCLK = 2.6GHz

CENTER 1396.5MHz

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

50kHz/DIV

SPAN 500kHz

100

10k

100k

10M

100M

FREQUENCY OFFSET (Hz)

–70

–90

–80

–100

–110

–120

–130

–140

–150

–160

–170

SMA

SMA AND

ADCLK925

100

10k

100k

10M

100M

FREQUENCY OFFSET (Hz)

–70

–90

–80

–100

–110

–120

–130

–140

–150

–160

–170

1396MHz

696MHz

427MHz

171MHz

AD9914PCBZ bảng dữ liệu(PDF) 13 Page - Analog Devices

AD9914PCBZ bảng dữ liệu(HTML) 13 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

bảng dữ liệu tải về

Link URL