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TLK105 bảng dữ liệu(PDF) 89 Page - Texas Instruments

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tên linh kiện TLK105
Giải thích chi tiết về linh kiện  Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver
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TLK105 bảng dữ liệu(HTML) 89 Page - Texas Instruments

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TX_CLK
TX_EN
TXD[3:0]
CRS
RX_CLK
RX_DV
RXD[3:0]
T0361-01
t
1
TLK105
TLK106
www.ti.com
SLLSEB8A – AUGUST 2012 – REVISED MARCH 2013
(1)
Due to the nature of the descrambler function, all 100Base-TX Loopback modes cause an initial dead-time of up to 550
μs during
which time no data is present at the receive MII outputs. The 100Base-TX timing specified is based on device delays after the initial
550µs dead-time.
(2)
Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
(3)
External loopback was measured using very short external cable (approximately 10cm).
(4)
Since MII loopback introduce extreme short roundtrip delay, some hosts would use PCS Input loopback (Mainly in 100BT).
Figure 9-21. 100Mbs Loopback Timing
Copyright © 2012–2013, Texas Instruments Incorporated
Electrical Specifications
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