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M68ICS08GR bảng dữ liệu(PDF) 253 Page - Freescale Semiconductor, Inc |
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M68ICS08GR bảng dữ liệu(HTML) 253 Page - Freescale Semiconductor, Inc |
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253 / 408 page ![]() Serial Communications Interface (SCI) I/O Registers MC68HC908GR8 — Rev 4.0 Technical Data MOTOROLA Serial Communications Interface (SCI) 253 LOOPS — Loop Mode Select Bit This read/write bit enables loop mode operation. In loop mode the PE1/RxD pin is disconnected from the SCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver must be enabled to use loop mode. Reset clears the LOOPS bit. 1 = Loop mode enabled 0 = Normal operation enabled ENSCI — Enable SCI Bit This read/write bit enables the SCI and the SCI baud rate generator. Clearing ENSCI sets the SCTE and TC bits in SCI status register 1 and disables transmitter interrupts. Reset clears the ENSCI bit. 1 = SCI enabled 0 = SCI disabled TXINV — Transmit Inversion Bit This read/write bit reverses the polarity of transmitted data. Reset clears the TXINV bit. 1 = Transmitter output inverted 0 = Transmitter output not inverted NOTE: Setting the TXINV bit inverts all transmitted values, including idle, break, start, and stop bits. M — Mode (Character Length) Bit This read/write bit determines whether SCI characters are eight or nine bits long. See Table 18-5. The ninth bit can serve as an extra stop bit, as a receiver wakeup signal, or as a parity bit. Reset clears the M bit. Address: $0013 Bit 7 654321 Bit 0 Read: LOOPS ENSCI TXINV M WAKE ILTY PEN PTY Write: Reset: 00000000 Figure 18-9. SCI Control Register 1 (SCC1) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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