M68ICS08GR datasheet(246/408 Pages) FREESCALE

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Serial Communications Interface (SCI)

Technical Data

MC68HC908GR8 — Rev 4.0

246

Serial Communications Interface (SCI)

MOTOROLA

tolerance is much more than the degree of misalignment that is likely to

occur.

As the receiver samples an incoming character, it resynchronizes the RT

clock on any valid falling edge within the character. Resynchronization

within characters corrects misalignments between transmitter bit times

and receiver bit times.

18.5.3.6 Slow Data Tolerance

Figure 18-7 shows how much a slow received character can be

misaligned without causing a noise error or a framing error. The slow

stop bit begins at RT8 instead of RT1 but arrives in time for the stop bit

data samples at RT8, RT9, and RT10.

Figure 18-7. Slow Data

For an 8-bit character, data sampling of the stop bit takes the receiver

9bit times

× 16 RT cycles + 10 RT cycles = 154 RT cycles.

With the misaligned character shown in Figure 18-7, the receiver counts

154 RT cycles at the point when the count of the transmitting device is

9bit times

× 16 RT cycles + 3 RT cycles = 147 RT cycles.

The maximum percent difference between the receiver count and the

transmitter count of a slow 8-bit character with no errors is

For a 9-bit character, data sampling of the stop bit takes the receiver

10 bit times

× 16 RT cycles + 10 RT cycles = 170 RT cycles.

MSB

STOP

DATA

SAMPLES

RECEIVER

RT CLOCK

154

147

–

154

--------------------------

100

4.54%

Freescale Semiconductor, Inc.

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Go to: www.freescale.com

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