M68ICS08GR datasheet(238/408 Pages) FREESCALE

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Serial Communications Interface (SCI)

Technical Data

MC68HC908GR8 — Rev 4.0

238

Serial Communications Interface (SCI)

MOTOROLA

18.5.2.2 Character Transmission

During an SCI transmission, the transmit shift register shifts a character

out to the PE2/TxD pin. The SCI data register (SCDR) is the write-only

buffer between the internal data bus and the transmit shift register. To

initiate an SCI transmission:

1. Enable the SCI by writing a logic 1 to the enable SCI bit (ENSCI)

in SCI control register 1 (SCC1).

2. Enable the transmitter by writing a logic 1 to the transmitter enable

bit (TE) in SCI control register 2 (SCC2).

3. Clear the SCI transmitter empty bit by first reading SCI status

4. Repeat step 3 for each subsequent transmission.

At the start of a transmission, transmitter control logic automatically

loads the transmit shift register with a preamble of logic 1s. After the

preamble shifts out, control logic transfers the SCDR data into the

transmit shift register. A logic 0 start bit automatically goes into the least

significant bit position of the transmit shift register. A logic 1 stop bit goes

into the most significant bit position.

The SCI transmitter empty bit, SCTE, in SCS1 becomes set when the

SCDR transfers a byte to the transmit shift register. The SCTE bit

indicates that the SCDR can accept new data from the internal data bus.

If the SCI transmit interrupt enable bit, SCTIE, in SCC2 is also set, the

SCTE bit generates a transmitter CPU interrupt request.

When the transmit shift register is not transmitting a character, the

PE2/TxD pin goes to the idle condition, logic 1. If at any time software

clears the ENSCI bit in SCI control register 1 (SCC1), the transmitter and

receiver relinquish control of the port E pins.

18.5.2.3 Break Characters

Writing a logic 1 to the send break bit, SBK, in SCC2 loads the transmit

shift register with a break character. A break character contains all logic

0s and has no start, stop, or parity bit. Break character length depends

on the M bit in SCC1. As long as SBK is at logic 1, transmitter logic

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