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HT85F2270 bảng dữ liệu(PDF) 185 Page - Holtek Semiconductor Inc |
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HT85F2270 bảng dữ liệu(HTML) 185 Page - Holtek Semiconductor Inc |
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185 / 226 page  Rev. 1.00 18� of ��6 �a� 1�� �01� Standard 8051 8-Bit Flash MCU HT85F2260/HT85F2270/HT85F2280 I2C Status Codes The I2CSTA register reflects the current status of the I2C interface. The three least significant bits of this register are always zero. There are 26 possible status codes, presented in the accompanying tables. When any one of 25 out of a total of 26 possible I2C states is entered, an interrupt is requested. The only state that does not generate an interrupt is the F8h state. The contents of the I2CDAT register is only available when an I2C interrupt takes place and the SI bit is set high. This register is read-only and should not be written to by the application program. In the table below, the term “SLA” means the slave address, “R” means the R/W bit=1 which are transferred together with the slave address, “W” means the R/W bit=0 transferred together with the slave address. I2C Status in Master Transmitter Mode Status Code Status of the I2C Application software response Next action taken by the I2C hardware to/from I2CDAT to I2CCON STA STO SI AA 08H START condition has been transmitted Load SLA+W X 0 0 X SLA+W will be transmitted; ACK will be received 10H Repeated START condition has been transmitted Load SLA+W X 0 0 X SLA+W will be transmitted; ACK will be received Load SLA+W X 0 0 X SLA+R will be transmitted; I�C will be switched to “�aster receiver” mode 18H SLA+W has been transmitted; ACK has been received Load data b�te 0 0 0 X Data b�te will be transmitted; ACK will be received No action 1 0 0 X Repeated START will be transmitted; No action 0 1 0 X STOP condition will be transmitted; the “STO” flag will be reset No action 1 1 0 X STOP condition followed b� a START condition will be transmitted; the “STO” flag will be reset �0H SLA+W has been transmitted; “not ACK” has been received Load data b�te 0 0 0 X Data b�te will be transmitted; ACK will be received No action 1 0 0 X Repeated START will be transmitted No action 0 1 0 X STOP condition will be transmitted; the “STO” flag will be reset No action 1 1 0 X STOP condition followed b� a START condition will be transmitted; the “STO” flag will be reset �8H Data b�te in I�CDAT has been transmitted; ACK has been received Load data b�te 0 0 0 X Data b�te will be transmitted; ACK bit will be received No action 1 0 0 X Repeated START will be transmitted No action 0 1 0 X STOP condition will be transmitted; the “STO” flag will be reset No action 1 1 0 X STOP condition followed b� a START condition will be transmitted; STO flag will be reset �0H Data b�te in I�CDAT has been transmitted data b�te 0 0 0 X Data b�te will be transmitted; ACK will be received No action 1 0 0 X Repeated START will be transmitted; No action 0 1 0 X STOP condition will be transmitted; STO flag will be reset No action 1 1 0 X STOP condition followed b� a START condition will be transmitted; STO flag will be reset �8H Arbitration lost in SLA+R/W or data b�tes No action 0 0 0 X I � C bus will be released; the “not addressed slave” state will be entered No action 1 0 0 X A START condition will be transmitted when the bus becomes free |
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