LM555

www.ti.com

SNAS548C – FEBRUARY 2000 – REVISED MARCH 2013

APPLICATIONS INFORMATION

MONOSTABLE OPERATION

In this mode of operation, the timer functions as a one-shot (Figure 12). The external capacitor is initially held

pin 2, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high.

Figure 12. Monostable

and drives the output to its low state. Figure 13 shows the waveforms generated in this mode of operation. Since

the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing

interval is independent of supply.

Top Trace: Input 5V/Div.

TIME = 0.1 ms/DIV.

Middle Trace: Output 5V/Div.

Bottom Trace: Capacitor Voltage 2V/Div.

C = 0.01

μF

Figure 13. Monostable Waveforms

During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit

so long as the trigger input is returned high at least 10

μs before the end of the timing interval. However the circuit

can be reset during this time by the application of a negative pulse to the reset terminal (pin 4). The output will

then remain in the low state until a trigger pulse is again applied.

false triggering.

Figure 14 is a nomograph for easy determination of R, C values for various time delays.

NOTE

In monostable operation, the trigger should be driven high before the end of timing cycle.

Copyright © 2000–2013, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Links: LM555