PIC16F737 datasheet(15/280 Pages) MICROCHIP

15 / 280 page

 2003-2013 Microchip Technology Inc.

DS30498D-page 15

PIC16F7X7

2.0

MEMORY ORGANIZATION

There are two memory blocks in each of these PIC®

MCUs. The program memory and data memory have

separate buses so that concurrent access can occur

and is detailed in this section. The program memory

can be read internally by user code (see Section 3.0

“Reading Program Memory”).

Additional information on device memory may be found

in the “PIC® Mid-Range MCU Family Reference Man-

ual” (DS33023).

2.1

Program Memory Organization

The PIC16F7X7 devices have a 13-bit program counter

capable of addressing an 8K word x 14-bit program

memory space. The PIC16F767/777 devices have

8K words

Flash

program

memory

and

the

PIC16F737/747 devices have 4K words. The program

memory maps for PIC16F7X7 devices are shown in

Figure 2-1. Accessing a location above the physically

implemented address will cause a wraparound.

The Reset vector is at 0000h and the interrupt vector is

at 0004h.

2.2

Data Memory Organization

The data memory is partitioned into multiple banks

which contain the General Purpose Registers and the

Special Function Registers. Bits RP1 (Status<6>) and

RP0 (Status<5>) are the bank select bits:

Each bank extends up to 7Fh (128 bytes). The lower

locations of each bank are reserved for the Special

Function Registers. Above the Special Function Regis-

ters are General Purpose Registers, implemented as

static RAM. All implemented banks contain Special

Function Registers. Some frequently used Special

Function Registers from one bank may be mirrored in

another bank for code reduction and quicker access.

2.2.1

GENERAL PURPOSE

The register file (shown in Figure 2-2 and Figure 2-3)

can be accessed either directly, or indirectly, through

the File Select Register (FSR).

FIGURE 2-1:

PROGRAM MEMORY MAPS AND STACKS FOR PIC16F7X7 DEVICES

RP1:RP0

Bank

PC<12:0>

0000h

0004h

0005h

Stack Level 1

Stack Level 8

Reset Vector

Interrupt Vector

On-Chip

CALL, RETURN

RETFIE, RETLW

1FFFh

Stack Level 2

Program

Memory

Page 0

0FFFh

1000h

07FFh

0800h

Page 1

17FFh

1800h

Page2

Page 3

Memory available on all

PIC16F7X7.

Memory available on PIC16F767

and PIC16F777. The memory

wraps to 000h through 0FFFh on

the PIC16F737 and PIC16F747.

PIC16F737 bảng dữ liệu(PDF) 15 Page - Microchip Technology

PIC16F737 bảng dữ liệu(HTML) 15 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL