ADDC02808PB datasheet(9/20 Pages) AD

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ADDC02808PB

REV. A

–9–

8.1

7.4

–200

800

–100

100

200

300

400

500

600

700

7.9

7.8

7.7

7.6

7.5

TIME –

Figure 21. Predicted Response for 24 A Step Load

Change in Load Current, di/dt = 12 A/

µs, for C

LOAD =

2,000

µF and R

ESR = 5 mΩ

8.1

7.4

–200

800

–100

100

200

300

400

500

600

700

7.9

7.8

7.7

7.6

7.5

TIME –

Figure 22. Predicted Response for 24 A Step Load

Change in Load Current, di/dt = 12 A/

µs, for C

LOAD =

4,000

µF and R

ESR = 2.5 mΩ

Factory Set Internal Compensation

If the user knows the external load capacitance and RESR to be

used in the application and if the application requires better

pulse response than is summarized in Table I, then the internal

feedback compensation can be modified at the factory to im-

prove the transient response. In these instances, the compensa-

tion is optimized for a particular CLOAD at the expense of

performing well over a broader range of CLOAD. The predicted

maximum output voltage deviation and settling times for fac-

tory-modified feedback compensation are shown in Figures 23,

24, and 25, and summarized in Table II, for three combinations

of CLOAD and RESR. As can be seen, optimizing the compensa-

tion for a given load capacitance gives the best transient re-

sponse in terms of both voltage deviation and settling time.

Table II.

Output Response to a 24 A (1 A-25 A) Step in

Load Current (Compensation Optimized)

Typical

Settling Time

See

CLOAD

RESR

Deviation

(Within 1%)

Figure

1,000

µF

10 m

Ω

–4%

125

µs23

2,000

µF5 mΩ

–2.5%

100

µs24

4,000

µF

2.5 m

Ω

–1%

µs25

Connection to Load

Pulse performance is dependent on minimizing the parasitic

impedances in the connection between the converter output and

the load and external capacitors. Low inductance and low resis-

tance connections should be used. Multilayer connections should

be avoided to minimize stray capacitance. The converter should

be placed as close to the load and external capacitors as possible.

8.1

7.4

–200

800

–100

100

200

300

400

500

600

700

7.9

7.8

7.7

7.6

7.5

TIME –

Figure 23. Predicted Response for 24 A Step Load Change,

di/dt = 12 A/

µs, with Factory Set Internal Compensation

Optimized for CLOAD = 1,000 µF and RESR = 10 mΩ

8.1

7.4

–200

800

–100

100

200

300

400

500

600

700

7.9

7.8

7.7

7.6

7.5

TIME –

Figure 24. Predicted Response for 24 A Step Load Change,

di/dt = 12 A/

µs, with Factory Set Internal Compensation

Optimized for CLOAD = 2,000 µF and RESR = 5 mΩ

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