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MMA9550LT bảng dữ liệu(PDF) 8 Page - Freescale Semiconductor, Inc |
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MMA9550LT bảng dữ liệu(HTML) 8 Page - Freescale Semiconductor, Inc |
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8 / 25 page ![]() MMA955xL Sensors 8 Freescale Semiconductor, Inc. • General-Purpose Timer/PWM Module (TPM) –I2C master interface –I2C or SPI slave interface – System Integration Module (SIM) – Clock-Generation Module The slave interfaces (either SPI or I2C) operate independently of the CPU subsystem. They can be accessed at any time, includ- ing while the device is in low-power, deep-sleep mode. 3.2 Packaging Information The package pinout definition for this device is designed as a super set of functions found typically on Freescale’s ColdFire V1 CPU offering, as well as other competitive devices. All pins on the device are utilized and many are multiplexed. The following sections describe the pinout. Users can select from multiple pin functions via the SIM pin, mux-control registers. 3.2.1 Package diagrams Figure 2. Device pinout (top view) and package frame convention 1 2 3 4 5 67 8 9 13 12 11 10 16 15 14 VDD RGPIO7/AN1/TPMCH1 BKGD-MS/RGPIO9 RESETB SCL0/RGPIO0/SCLK VSS RGPIO6/AN0/TPMCH0 RGPIO5/PDB_A/INT_O VSS RGPIO4/INT Direction of the detectable accelerations X Y Z 1 (TOP VIEW) |
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