PCA9522

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 1 — 28 September 2011

9 of 20

NXP Semiconductors

PCA9522

Fast dual bidirectional bus buffer with hot insertion logic

An ideal backplane application for the PCA9522 is the Advanced Telecom Computing

Architecture (AdvancedTCA) as shown in Figure 9. The PCA9522 is well-suited to

placement on ‘Field Replaceable Units’ (FRUs) used in either a conventional fully-bused

arrangement (not shown) or in the low cost, high noise margin radial architecture example

as shown in Figure 10. It is fully interoperable with existing systems and components. If

required, Figure 10 shows a simple low-cost circuit for use at the Shelf Manager for

accelerating the rise in bused systems.

In each of these examples, the buffers are intended to extend total system capacitance

above 400 pF, so anticipate high capacitance on each side. When loading on one side is

small, adding 47 pF is suggested to avoid any waveform ripple, should it occur.

Fig 8.

PCA9522 backplane application

R3

1.1 kΩ

R7

6.8 kΩ

SCLC

SDAC

EN

U1

PCA9522

(3.3 V)

C2

0.01 μF

SCLB

SDAB

002aaf322

RDY

R4

1.1 kΩ

CARD

SUPPLY

GND

PERIPHERAL CARD 1

R5

600 Ω

R8

3.6 kΩ

SCLC

SDAC

EN

U2

PCA9522

(1.8 V)

C2

0.01 μF

SCLB

SDAB

RDY

R6

600 Ω

CARD

SUPPLY

GND

PERIPHERAL CARD n

backplane

R1

1.5 kΩ

R2

1.5 kΩ

SCL

SDA

GND

(3.3 V)

(3.3 V)