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W78LE812 bảng dữ liệu(PDF) 17 Page - Winbond

tên linh kiện W78LE812
Giải thích chi tiết về linh kiện  8-BIT MTP MICROCONTROLLER
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W78LE812 bảng dữ liệu(HTML) 17 Page - Winbond

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W78LE812
Publication Release Date: February 1999
- 17 -
Revision A2
AC CHARACTERISTICS
The AC specifications are a function of the particular process used to manufacture the part, the
ratings of the I/O buffers, the capacitive load, and the internal routing capacitance. Most of the
specifications can be expressed in terms of multiple input clock periods (TCP), and actual parts will
usually experience less than a
±20 nS variation. The numbers below represent the performance
expected from a 0.6micron CMOS process when using 2 and 4 mA output buffers.
Clock Input Waveform
T
T
XTAL1
F
CH
CL
OP,
TCP
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
NOTES
Operating Speed
FOP
0
-
24
MHz
1
Clock Period
TCP
25
-
-
nS
2
Clock High
TCH
10
-
-
nS
3
Clock Low
TCL
10
-
-
nS
3
Notes:
1. The clock may be stopped indefinitely in either state.
2. The TCP specification is used as a reference in other specifications.
3. There are no duty cycle requirements on the XTAL1 input.
Program Fetch Cycle
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
UNIT
NOTES
Address Valid to ALE Low
TAAS
1 TCP -
∆
-
-
nS
4
Address Hold from ALE Low
TAAH
1 TCP -
∆
-
-
nS
1, 4
ALE Low to
PSEN Low
TAPL
1 TCP -
∆
-
-
nS
4
PSEN Low to Data Valid
TPDA
-
-
2 TCP
nS
2
Data Hold after PSEN High
TPDH
0
-
1 TCP
nS
3
Data Float after PSEN High
TPDZ
0
-
1 TCP
nS
ALE Pulse Width
TALW
2 TCP -
∆
2 TCP
-
nS
4
PSEN Pulse Width
TPSW
3 TCP -
∆
3 TCP
-
nS
4
Notes:
1. P0.0
−P0.7, P2.0−P2.7 remain stable throughout entire memory cycle.
2. Memory access time is 3 TCP.
3. Data have been latched internally prior to PSEN going high.
4. "
∆" (due to buffer driving delay and wire loading) is 20 nS.



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