W78LE812

Publication Release Date: February 1999

- 11 -

Revision A2

Clock

The W78LE812 is designed to be used with either a crystal oscillator or an external clock. Internally,

the clock is divided by two before it is used. This makes the W78LE812 relatively insensitive to duty

cycle variations in the clock. The W78LE812 incorporates a built-in crystal oscillator. To make the

oscillator work, a crystal must be connected across pins XTAL1 and XTAL2. In addition, a load

capacitor must be connected from each pin to ground. An external clock source should be connected

to pin XTAL1. Pin XTAL2 should be left unconnected. The XTAL1 input is a CMOS-type input, as

required by the crystal oscillator.

Power Management

Idle Mode

The idle mode is entered by setting the IDL bit in the PCON register. In the idle mode, the internal

clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked. The

processor will exit idle mode when either an interrupt or a reset occurs.

Power-down Mode

When the PD bit in the PCON register is set, the processor enters the power-down mode. In this

mode all of the clocks are stopped, including the oscillator.

AUXR - Auxiliary Register

Bit:

7

6

5

4

3

2

1

0

-

-

-

-

-

-

-

AO

Mnemonic: AUXR

Address: 8Eh

AO:

Turn off ALE signal.

Reduce EMI Emission

Because of the on-chip MTP-ROM, when a program is running in internal ROM space, the ALE will be

unused. The transition of ALE will cause noise, so it can be turned off to reduce the EMI emission if it

is not needed. Turning off the ALE signal transition only requires setting the bit 0 of the AUXR SFR,

which is located at 08Eh. When ALE is turned off, it will be reactivated when the program accesses

external ROM/RAM data or jumps to execute an external ROM code. The ALE signal will turn off

again after it has been completely accessed or the program returns to internal ROM code space..

Reset

The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two

machine cycles while the oscillator is running. An internal trigger circuit in the reset line is used to

deglitch the reset line when the W78LE812 is used with an external RC network. The reset logic also

has a special glitch removal circuit that ignores glitches on the reset line.

During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of

bit 4) to 00H, and all of the other SFR registers except SBUF to 00H. SBUF is not reset.