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PXR40 bảng dữ liệu(PDF) 65 Page - Freescale Semiconductor, Inc |
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PXR40 bảng dữ liệu(HTML) 65 Page - Freescale Semiconductor, Inc |
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65 / 100 page ![]() Electrical characteristics PXR40 Microcontroller Data Sheet, Rev. 1 Freescale Semiconductor 65 5.7.3 LVDS pad specifications LVDS pads are implemented to support the MSC (Microsecond Channel) protocol, which is an enhanced feature of the DSPI module. Table 13. VDD33 Pad Average DC Current 1 1 These are average IDDE for worst case PVT from simulation. Currents apply to output pins only for the fast pads and to input pins only for the medium pads. Spec Pad Type Symbol Frequency (MHz) Load2 (pF) 2 All loads are lumped. VDD33 (V) VDDE (V) Drive/Slew Rate Select Current (mA) 1Medium I33_MH — — 3.6 5.5 — 0.0007 2Fast I33_FC 66 10 3.6 3.6 00 0.92 366 20 3.6 3.6 01 1.14 466 30 3.6 3.6 10 1.50 566 50 3.6 3.6 11 2.19 6Fast w/ Slew Control I33_FSR 66 50 3.6 3.6 11 0.74 750 50 3.6 3.6 10 0.52 8 33.33 50 3.6 3.6 00 0.19 920 50 3.6 3.6 00 0.19 10 20 200 3.6 3.6 00 0.19 Table 14. DSPI LVDS pad specification # Characteristic Symbol Condition Min. Value Typ. Value Max. Value Unit Data Rate 1 Data Frequency f LVDSCLK —— 50 — MHz Driver Specs 2 Differential output voltage VOD SRC=0b00 or 0b11 150 — 400 mV SRC=0b01 90 — 320 SRC=0b10 160 — 480 3 Common mode voltage (LVDS), VOS VOS — 1.06 1.2 1.39 V 4 Rise/Fall time TR/TF —— 2 — ns 5 Propagation delay (Low to High) TPLH —— 4 — ns 6 Propagation delay (High to Low) TPHL —— 4 — ns 7 Delay (H/L), sync Mode tPDSYNC —— 4 — ns 8 Delay, Z to Normal (High/Low) TDZ —— 500 — ns |
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