PXD10 datasheet(52/130 Pages) FREESCALE

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Pinout and signal descriptions

PXD10 Microcontroller Data Sheet, Rev. 1

Freescale Semiconductor

2.8.1

Signal details

Table 7. Pad type descriptions

Abbreviation1

NOTES:

1 The pad descriptions refer to the different Pad Configuration Register (PCR) types. Refer to the SIUL chapter in the

device reference manual for the features available for each pad type.

Description

Fast (with GPIO and digital alternate function)

Slow pads with analog muxing (built for ADC channels)

Medium (with GPIO and digital alternate function)

Programmable medium/slow pad (programmed via the slew rate control in the PCR):

Slew rate disabled: Slow driver configuration (AC/DC parameters same as for a slow pad)

Slew rate enabled: Medium driver configuration (AC/DC parameters same as for a medium pad)

Slow (with GPIO and digital alternate function)

SMD

Stepper motor driver (with slew rate control)

Oscillator

Table 8. Signal details

Signal

Peripheral

Description

ABS[0]

BAM

Alternate Boot Select. Gives an option to boot by downloading code

via CAN or LIN.

ANS[0:15]

ADC

Inputs used to bring into the device sensor-based signals for A/D

conversion. ANS[0:15] connect to ATD channels [32:47].

MA[0:2]

ADC

These three control bits are output to enable the selection for an

external Analog Mux for expansion channels. The available 8

multiplexed channels connect to ATD channels [64:71].

FABM

Force Alternate Boot mode. Forces the device to boot from the

external bus (Can or LIN). If not asserted, the device boots up from

the lowest flash sector containing a valid boot signature.

DCU_DE

DCU

Indicates that valid pixels are present.

DCU_HSYNC

DCU

Horizontal sync pulse for TFT-LCD display

DCU_PCLK

DCU

Output pixel clock for TFT-LCD display

DCU_R[0:7],

DCU_G[0:7],

DCU_B[0:7]

DCU

Red, green and blue color 8-bit Pixel values for TFT-LCD displays

DCU_TAG

DCU

Indicates when a tagged pixel is present in safety mode

DCU_VSYNC

DCU

Vertical sync pulse for TFT-LCD display

PCS[0..2]_0,

PCS[0..2]_1

DSPI

Peripheral chip selects when device is in Master mode; not used in

slave modes.

SCK_0,

SCK_1

DSPI

SPI clock signal—bidirectional

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