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WM8523 bảng dữ liệu(PDF) 25 Page - Wolfson Microelectronics plc

tên linh kiện WM8523
Giải thích chi tiết về linh kiện  24-bit 192kHz Stereo DAC with 2Vrms Ground Referenced Line Output
PDF  51 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
Trang chủ  http://www.wolfsonmicro.com
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WM8523 bảng dữ liệu(HTML) 25 Page - Wolfson Microelectronics plc

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Production Data
WM8523
w
PD, Rev 4.1, August 2011
25
Interface timing is such that the input data and left/right clock are sampled on the rising edge of BCLK.
By setting the appropriate BCLK and LRCLK polarity bits, the WM8523 DAC can sample data on the
opposite clock edges.
The control of audio interface formats and clock polarities is summarised in Table 10.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R3
AIF_CTRL1
03h
1:0
AIF_FMT
10
Audio Data Interface Format
00 = Right justified
01 = Left justified
10 = I2S format
11 = DSP mode
2
Reserved
0
Reserved
4:3
AIF_WL
10
Audio Data Word Length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits
5
AIF_BCLK_
INV
0
BCLK Inversion Control
Slave mode:
0 = use rising edge
1 = use falling edge
Master mode:
0 = BCLK normal
1 = BCLK inverted
6
AIF_LRCLK
_INV
0
LRCLK Inversion Control
0 = normal polarity
1 = inverted polarity
When AIF_FMT[2:0]=011 (DSP Mode):
0 = mode A (2nd clock)
1 = mode B (1st clock)
Table 10 Audio Interface Control



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