WM8352 datasheet(247/336 Pages) WOLFSON

tên linh kiện	WM8352

Giải thích chi tiết về linh kiện	Wolfson AudioPlus™ Stereo CODEC with Power Management

PDF	336 Pages

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nhà sản xuất	WOLFSON [Wolfson Microelectronics plc]

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247 / 336 page

Production Data

WM8352

PD, February 2011, Rev 4.4

247

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R51 (33h)

DAC Digital

Volume R

DACR_ENA

Right DAC enable

0 = disabled

1 = enabled

DAC_VU

DAC left and DAC right volume do not update until a

1 is written to either DAC_VU register bit.

7:0

DACR_VOL[7:0] 1100_0000 Right DAC digital volume control:

0000_0000 = Digital mute

0000_0001 = -71.625dB

0000_0010 = -71.25dB

… (0.375dB steps)

1100_000 = 0dB

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R53 (35h)

DAC LR

Rate

DACLRC_ENA

Enables DAC LRC generation in Master

mode

0 = disabled

1 = enabled

10:0

DACLRC_RATE[10:0] 000_0100_0000 Determines the number of bit clocks per LRC

phase (when enabled)

00000000000 = invalid

...

00000000111 = invalid

00000001000 = 8 BCPS

…

11111111111 = 2047 BCPS

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R54 (36h)

DAC Clock

Control

DACCLK_POL

DAC Clock Polarity

0 = Normal

1 = Inverted

2:0

DAC_CLKDIV[2:0]

000

DAC Sample rate divider

000 = SYSCLK / 1.0

001 = SYSCLK / 1.5

010 = SYSCLK / 2

011 = SYSCLK / 3

100 = SYSCLK / 4

101 = SYSCLK / 5.5

110 = SYSCLK / 6

111 = Reserved

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