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WM8956CGEFL/V bảng dữ liệu(PDF) 57 Page - Wolfson Microelectronics plc

tên linh kiện WM8956CGEFL/V
Giải thích chi tiết về linh kiện  Hi-Fi DAC with 1W Stereo Class D Speaker Drivers and Headphone Drivers
PDF  80 Pages
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nhà sản xuất  WOLFSON [Wolfson Microelectronics plc]
Trang chủ  http://www.wolfsonmicro.com
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Production Data
WM8956
w
PD, November 2011, Rev 4.1
57
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R25 (19h)
Power
Management
(1)
8:7
VMIDSEL
00
Vmid Divider Enable and Select
00 = Vmid disabled (for OFF mode)
01 = 2 x 50k
 divider enabled (for playback /
record)
10 = 2 x 250k
 divider enabled (for low-
power standby)
11 = 2 x 5k
 divider enabled (for fast start-
up)
6
VREF
0
VREF (necessary for all other functions)
0 = Power down
1 = Power up
5
AINL
0
Analogue Input PGA and Boost Left
0 = Power down
1 = Power up
(Note: LMIC must also be set to enable the
PGA)
4
AINR
0
Analogue Input PGA and Boost Right
0 = Power down
1 = Power up
(Note: RMIC must also be set to enable the
PGA)
1
MICB
0
MICBIAS
0 = Power down
1 = Power up
0
DIGENB
0
Master Clock Disable
0 = Master clock enabled
1 = Master clock disabled
R26 (1Ah)
Power
Management
(2)
8
DACL
0
DAC Left
0 = Power down
1 = Power up
7
DACR
0
DAC Right
0 = Power down
1 = Power up
6
LOUT1
0
LOUT1 Output Buffer
0 = Power down
1 = Power up
5
ROUT1
0
ROUT1 Output Buffer
0 = Power down
1 = Power up
4
SPKL
0
SPK_LP/SPK_LN Output PGA.
0 = Power down
1 = Power up
(Note: Speaker output also requires
SPK_OP_EN[0] to be set)
3
SPKR
0
SPK_RP/SPK_RN Output PGA
0 = Power down
1 = Power up
(Note: Speaker output also requires
SPK_OP_EN[1] to be set)
1
OUT3
0
OUT3 Output Buffer
0 = Power down
1 = Power up



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