WM8533

Production Data

w

PD, July 2012, Rev 4.0

30

REGISTER MAP

The complete register map is shown below. The detailed description can be found in the relevant text of the device

description. The WM8533 can be configured using the Control Interface. All unused bits should be set to '0' and access to

unlisted registers should be avoided.

REG

NAME

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

DEFAULT

R0 (0h)

DEVICE_ID /

SW RESET

CHIP_ID [15:0]

8523h

R1 (1h)

REVISION

0

0

0

0

0

0

0

0

0

0

0

0

0

CHIP_REV [2:0]

0001h

R2 (2h)

PSCTRL1

0

0

0

0

0

0

0

0

0

0

0

0

0

0

SYS_ENA [1:0]

0000h

R3 (3h)

AIF_CTRL1

0

0

0

0

0

0

0

DAC_

DEEM

P

AIF_M

STR

AIF_L

RCLK_

INV

AIF_B

CLK_I

NV

AIF_WL [1:0]

0

AIF_FMT [1:0]

1812h

R4 (4h)

AIF_CTRL2

0

0

0

0

0

0

0

0

DAC_OP_MUX

[1:0]

AIF_BCLKDIV [2:0]

AIF_SR [2:0]

0000h

R5 (5h)

DAC_CTRL3

0

0

0

0

0

0

0

0

0

0

0

DAC_

ZC

DACR

_MUT

E

DACL_

MUTE

DAC_

VOL_

UP_R

AMP

DAC_

VOL_D

OWN_

RAMP

0001h

R6 (6h)

DAC_GAINL

0

0

0

0

0

0

DACL_

VU

DACL_VOL [8:0]

0190h

R7 (7h)

DAC_GAINR

0

0

0

0

0

0

DACR

_VU

DACR_VOL [8:0]

0190h

Table 22 Register Map