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CXR702F080 bảng dữ liệu(PDF) 8 Page - Sony Corporation

tên linh kiện CXR702F080
Giải thích chi tiết về linh kiện  CMOS 32-bit Single Chip Microcomputer
PDF  32 Pages
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nhà sản xuất  SONY [Sony Corporation]
Trang chủ  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXR702F080 bảng dữ liệu(HTML) 8 Page - Sony Corporation

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CXR702F080
Symbol
PN0/SCK0
PN1/SO0
PN2/SI0
PN3/SCS0/
INT8
PN4/SCK1
PN5/SO1
PN6/SI1
PN7/SCS1/
INT9
PO0/SCK2
PO1/SO2
PO2/SI2
PO3/SCS2
CS0, CS1
RD
LWR/LB
UWR/UB
MRD
MWE/WE
MCS0
DACK0
DREQ0
DACK1
DREQ1
MSDIR
MSBS
MSSCLK
MSDIO
MSINS
TEST0
TEST1
TEST2
TDI
I/O
I/O / I/O
I/O / Output
I/O / Input
I/O / Input /
Input
I/O / I/O
I/O / Output
I/O / Input
I/O / Input /
Input
I/O / I/O
I/O / Output
I/O / Input
I/O / Input
Output
Output
Output / Output
Output / Output
Output
Output / Output
Output
Output
Input
Output
Input
Output
Output
Output
I/O
Input
Input
Input
Input
Input
Functios
(Port N)
8-bit I/O port.
I/O can be specified in
1-bit units.
Pull-up resistor can be
incorporated through
program in 1-bit units.
(8 pins)
(Port O)
4-bit I/O port.
I/O can be specified in
1-bit units.
Pull-up resistor can be
incorporated through
program in 1-bit units.
(4 pins)
Chip select output for external S bus.
(2 pins)
Read signal output for external S bus.
Write strobe signal output for D0 to
D7.
Write strobe signal output for D8 to
D15.
Read signal output for external M bus.
Write signal output for external M bus.
Chip select output for external M bus.
Transfer request acknowledge signal output from DMA controller (CH0).
Transfer request input to DMA controller (CH0).
Transfer request acknowledge signal output from DMA controller (CH1).
Transfer request input to DMA controller (CH1).
Memory stick interface data I/O direction monitor.
Memory stick interface bus state output.
Memory stick interface clock output.
Memory stick interface data I/O direction monitor.
Memory stick interface card detection.
Test. (Connect to Vss.)
Data input for JTAG boundary scanning test.
Serial clock (CH0) I/O.
Serial data (CH0) output.
Serial data (CH0) input.
Serial chip select (CH0)
External interruption
input.
request input.
Serial clock (CH1) I/O.
Serial data (CH1) output.
Serial data (CH1) input.
Serial chip select (CH1)
External interruption
input.
request input.
Serial clock (CH2) I/O.
Serial data (CH2) output.
Serial data (CH2) input.
Serial chip select (CH2) input.
Strobe signal output indicates
access to D0 to D7.
Strobe signal output indicates
access to D8 to D15.
Write signal output for external S bus.



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