LPC81XM datasheet(14/67 Pages) NXP

14 / 67 page

LPC81xM

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Objective data sheet

Rev. 1.0 — 7 November 2012

14 of 67

NXP Semiconductors

LPC81xM

32-bit ARM Cortex-M0+ microcontroller

• Program the input glitch filter with different filter constants using one of the IOCON

divided clock signals (IOCONCLKCDIV, see Figure 9 “LPC81xM clock generation”).

You can also bypass the glitch filter.

• Invert the input signal.

• Hysteresis can be enabled or disabled.

• For pins PIO0_10 and PIO0_11, select the I2C-mode and output driver for standard

digital operation, for I2C standard and fast modes, or for I2C Fast mode+.

• On mixed digital/analog pins, enable the analog input mode. Enabling the analog

mode disconnects the digital functionality.

Remark: The functionality of each I/O pin is flexible and is determined entirely through the

switch matrix. See Section 7.9 for details.

7.8.1 Standard I/O pad configuration

Figure 7 shows the possible pin modes for standard I/O pins with analog input function:

• Digital output driver with configurable open-drain output

• Digital input: Weak pull-up resistor (PMOS device) enabled/disabled

• Digital input: Weak pull-down resistor (NMOS device) enabled/disabled

• Digital input: Repeater mode enabled/disabled

• Digital input: Input glitch filter selectable on all pins

• Analog input

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