S29GL01GS datasheet(12/104 Pages) SPANSION

12 / 104 page

GL-S MirrorBit® Family

S29GL_128S_01GS_00_06 March 16, 2012

Da ta

Sh e e t

Software Interface

Address Space Maps

There are several separate address spaces that may appear within the address range of the flash memory

device. One address space is visible (entered) at any given time.

 Flash Memory Array: the main non-volatile memory array used for storage of data that may be randomly

accessed by asynchronous read operations.

 ID/CFI: a Flash memory array used for Spansion factory programmed device characteristics information.

This area contains the Device Identification (ID) and Common Flash Interface (CFI) information tables.

 Secure Silicon Region (SSR): a One Time Programmable (OTP) non-volatile memory array used for

Spansion factory programmed permanent data, and customer programmable permanent data.

 Lock Register: an OTP non-volatile word used to configure the ASP features and lock the SSR.

 Persistent Protection Bits (PPB): a non-volatile flash memory array with one bit for each Sector. When

programmed, each bit protects the related Sector from erasure and programming.

 PPB Lock: a volatile register bit used to enable or disable programming and erase of the PPB bits.

 Password: an OTP non-volatile array used to store a 64-bit password used to enable changing the state of

the PPB Lock Bit when using Password Mode sector protection.

 Dynamic Protection Bits (DYB): a volatile array with one bit for each Sector. When set, each bit protects the

related Sector from erasure and programming.

 Status Register: a volatile register used to display Embedded Algorithm status.

 Data Polling Status: a volatile register used as an alternate, legacy software compatible, way to display

Embedded Algorithm status.

The main Flash Memory Array is the primary and default address space but, it may be overlaid by one other

address space, at any one time. Each alternate address space is called an Address Space Overlay (ASO).

Each ASO replaces (overlays) the entire flash device address range. Any address range not defined by a

particular ASO address map, is reserved for future use. All read accesses outside of an ASO address map

returns non-valid (undefined) data. The locations will display actively driven data but the meaning of whatever

1’s or 0’s appear are not defined.

There are four address map modes that determine what appears in the flash device address space at any

given time:

 Read Mode

 Data Polling Mode

 Status Register (SR) Mode

 Address Space Overlay (ASO) Mode

In Read Mode the entire Flash Memory Array may be directly read by the host system memory controller. The

memory device Embedded Algorithm Controller (EAC), puts the device in Read mode during Power-on, after

a Hardware Reset, after a Command Reset, or after an Embedded Algorithm (EA) is suspended. Read

accesses and commands are accepted in read mode. A subset of commands are accepted in read mode

when an EA is suspended.

While in any mode, the Status Register read command may be issued to cause the Status Register ASO to

appear at every word address in the device address space. In this Status Register ASO Mode, the device

interface waits for a read access and, any write access is ignored. The next read access to the device

accesses the content of the status register, exits the Status Register ASO, and returns to the previous

(calling) mode in which the Status Register read command was received.

In EA mode the EAC is performing an Embedded Algorithm, such as programming or erasing a non-volatile

memory array. While in EA mode, none of the main Flash Memory Array is readable because the entire flash

device address space is replaced by the Data Polling Status ASO. Data Polling Status will appear at every

word location in the device address space.

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