SPC560D40L1 datasheet(63/82 Pages) STMICROELECTRONICS

63 / 82 page

SPC560D30x, SPC560D40x

Electrical characteristics

Doc ID 16315 Rev 5

63/82

charge level on CS cannot be modified by the analog signal source during the time in which

the sampling switch is closed.

The considerations above lead to impose new constraints on the external circuit, to reduce

the accuracy error due to the voltage drop on CS; from the two charge balance equations

above, it is simple to derive Equation 11 between the ideal and real sampled voltage on CS:

Equation 11:

From this formula, in the worst case (when VA is maximum, that is for instance 5 V),

assuming to accept a maximum error of half a count, a constraint is evident on CF value:

Equation 12:

4.17.3

ADC electrical characteristics

------------

--------------------------------------------------------

2048 C

•

Table 41.

ADC input leakage current

Symbol

Parameter

Conditions

Value

Unit

Min

Typ

Max

ILKG CC

Input leakage

current

TA = −40 °C

No current injection on adjacent pin

—1—

CTA =25 °C

—

CTA = 105 °C

—

200

PTA = 125 °C

—

400

Table 42.

ADC conversion characteristics

Symbol

Parameter

Conditions(1)

Value

Unit

Min

Typ

Max

VSS_ADC SR —

Voltage on

VSS_HV_ADC (ADC

reference) pin with

respect to ground

(VSS)

(2)

—

−0.1

—

0.1

VDD_ADC SR —

Voltage on

VDD_HV_ADC pin

(ADC reference) with

respect to ground

(VSS)

—VDD − 0.1

—

VDD +0.1

VAINx

SR — Analog input voltage(3)

—VSS_ADC − 0.1

—

VDD_ADC +0.1 V

fADC

SR — ADC analog frequency

VDD =5.0 V

3.33

—

32 + 4%

MHz

VDD =3.3 V

3.33

—

20 + 4%

SPC560D40L1 bảng dữ liệu(PDF) 63 Page - STMicroelectronics

SPC560D40L1 bảng dữ liệu(HTML) 63 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

bảng dữ liệu tải về

Link URL