L99DZ70XP datasheet(35/47 Pages) STMICROELECTRONICS

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L99DZ70XP

SPI - control and status registers

Doc ID 15162 Rev 3

35/47

5.2

Control register 1

Table 26.

Control register 1 (read/write)

Bit

Name

Comment

OUT7 – HS1

on/off

OUT

7/8

OUT7 – HS2

on/off

HS1

HS2

Mode

Off

OUT8 – HS1

on/off

Low on-resistance

High on-resistance

OUT8 – HS2

on/off

Off

OUT9 – HS

on/off

If a bit is set, the selected output driver is switched on. If the corresponding

PWM enable bit is set the driver is only activated if PWM1 (PWM2) input

signal is high. The outputs of OUT1-OUT6 are half bridges. If the bits of HS-

and LS-driver of the same half bridge are set, the internal logic prevents that

both drivers of this output stage can be switched on simultaneously in order to

avoid a high internal current from VS to GND.

OUT10 – HS

on/off

OUT11 – HS

on/off

ECV – LS on/off

7EC bit 5

Reference value for difference voltage amplifier at pin ECV is binary coded.

Full scale value is set in control register 2. If all EC bits are set to zero the

reference value is 0V. For fast discharge a lowside switch can be activated at

pin ECV, if the ECV – LS on/off bit is set to '1'..

6EC bit 4

5EC bit 3

4EC bit 2

3EC bit 1

2EC bit 0

EC switch

In case this bit is set to 1, the electrochrome control is active and enables the

driver at pin ECDR for the external MOS transistor. The bit switches the

highside OUT10 directly on, ignoring bit 10 in control register 1. If the drain of

the external MOS transistor is connected to OUT10, the current from supply

VS to the load at ECV can be monitored.

Reserved (has to be set to '0')

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