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STA7360 bảng dữ liệu(PDF) 19 Page - STMicroelectronics

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STA7360 bảng dữ liệu(HTML) 19 Page - STMicroelectronics

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STA7360
Block description
Doc ID 9814 Rev 4
19/28
4.7
Output stage
Poor current capability and low cutoff frequency are well-known limits of the standard lateral
PNP. Composite PNP-NPN power output stages have been widely used, regardless of their
high saturation drop. This drop can be overcome only at the expense of external
components, namely, the bootstrap capacitors. The availability of 4 A isolated collector PNP
(ICV PNP) adds versatility to the design. The performance of this component, in terms of
gain, VCEsat and cutoff frequency, is shown in Figure 27, 28, and 29 respectively. It is
realized in a new bipolar technology, characterized by top-bottom isolation techniques,
allowing the implementation of low leakage diodes, too. It guarantees BVCEO > 20 V and
BVCBO > 50 V both for NPN and PNP transistors. Basically, the connection shown in
Figure 30 has been chosen. First of all because its voltage swing is rail-to-rail, limited only
by the VCEsat of the output transistors, which are in the range of 0.3 W each. Then, the gain
VOUT/VIN is greater than unity, approximately 1+R2/R1. (VCC/2 is fixed by an auxiliary
amplifier common to both channel). It is possible, controlling the amount of this local
feedback, to force the loop gain (A * b) to less than unity at frequencies for which the phase
shift is 180°. This means that the output buffer is intrinsically stable and not prone to
oscillation.
Figure 27.
ICV - PNP gain vs. IC
Figure 28.
ICV - PNP VCE (sat) vs. IC
Figure 29.
ICV - PNP cutoff frequency vs. IC



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