STA339BW datasheet(36/77 Pages) STMICROELECTRONICS

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STA339BW

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Doc ID 15251 Rev 5

6.4.8

Submix mode enable

6.5

Configuration register E (addr 0x04)

6.5.1

Max power correction variable

6.5.2

Max power correction

Setting the MPC bit turns on special processing that corrects the STA339BW power device

at high power. This mode should lower the THD+N of a full FFX system at maximum power

output and slightly below. If enabled, MPC is operational in all output modes except tapered

(OM[1,0] = 01) and binary. When OCFG = 00, MPC will not effect channels 3 and 4, the line-

out channels.

6.5.3

Noise-shaper bandwidth selection

Table 35.

Submix mode enable

Bit

R/W

RST

Name

Description

7R/W

SME

0: Sub Mix into Left/Right disabled

1: Sub Mix into Left/Right enabled

SVE

ZCE

DCCV

PWMS

AME

NSBW

MPC

MPCV

001

Table 36.

Max power correction variable

Bit

R/W

RST

Name

Description

0R/W

MPCV

0: Use standard MPC coefficient

1: Use MPCC bits for MPC coefficient

Table 37.

Max power correction

Bit

R/W

RST

Name

Description

1R/W

MPC

Setting of 1 enables Power Bridge correction for

THD reduction near maximum power output.

Table 38.

Noise-shaper bandwidth selection

Bit

R/W

RST

Name

Description

R/W

NSBW

1: Third order NS

0: Fourth order NS

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