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STA333W bảng dữ liệu(PDF) 37 Page - STMicroelectronics

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STA333W
Register description
Doc ID 13365 Rev 2
37/49
6.9
Reserved registers (addr 0x2E, 0x2F, 0x30, 0x31)
These registers are not to be used.
6.10
Postscale registers (addr 0x32, 0x33)
Postscale
The STA333W provides one additional multiplication after the last interpolation stage and
the distortion compensation on each channel, which can be used to limit the maximum
modulation index and therefore the peak current through the power device. The register
values represent an 8-bit signed fractional number. This number is extended to a 24-bit
number, by adding zeros to the right, and then directly multiplied by the data on that
channel. An independent postscale is provided for each channel but all channels can use
channel 1 postscale factor by setting the postscale link bit. By default, all postscale factors
are set to 0x7F (pass-through).
2RO
-
OCWARN
Overcurrent warning:
0: warning
1: normal operation
3RO
-
OCFAULT
Overcurrent fault:
0: fault detected
1: normal operation
4
---
Reserved
5
RO
-
UVFAULT
Undervoltage warning:
0: VCCx below lower voltage threshold
1: normal operation
6RO
-
FAULT
Power bridge fault:
0: fault detected
1: normal operation
7
RO
-
PLLUL
PLL lock:
0: locked
1: not locked
Table 45.
Status bits description (continued)
Bit
R/W
RST
Name
Description
D7
D6
D5
D4
D3
D2
D1
D0
C1PS7
C1PS6
C1PS5
C1PS4
C1PS3
C1PS2
C1PS1
C1PS0
011
11111
D7
D6
D5
D4
D3
D2
D1
D0
C2PS7
C2PS6
C2PS5
C2PS4
C2PS3
C2PS2
C2PS1
C2PS0
011
11111



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