STM8S207MB datasheet(82/103 Pages) STMICROELECTRONICS

82 / 103 page

Electrical characteristics

STM8S207xx, STM8S208xx

82/103

Doc ID 14733 Rev 12

10.3.10

10-bit ADC characteristics

Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise

specified.

Table 44.

ADC characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fADC

ADC clock frequency

VDDA = 3 to 5.5 V

MHz

VDDA = 4.5 to 5.5 V

VDDA

Analog supply

5.5

VREF+

Positive reference voltage

2.75(1)

Data guaranteed by design, not tested in production..

VDDA

VREF-

Negative reference voltage

VSSA

0.5(1)

VAIN

Conversion voltage range(2)

During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged by the external

source. The internal resistance of the analog source must allow the capacitance to reach its final voltage

level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on

the conversion result. Values for the sample clock tS depend on programming.

VSSA

VDDA

Devices with external

VREF+/VREF- pins

VREF-

VREF+

CADC

Internal sample and hold

capacitor

3pF

(2)

Sampling time

fADC = 4 MHz

0.75

µs

fADC = 6 MHz

0.5

tSTAB

Wakeup time from standby

µs

tCONV

Total conversion time (including

sampling time, 10-bit resolution)

fADC = 4 MHz

3.5

µs

fADC = 6 MHz

2.33

µs

1/fADC

STM8S207MB bảng dữ liệu(PDF) 82 Page - STMicroelectronics

STM8S207MB bảng dữ liệu(HTML) 82 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL