SL3ICS1202 datasheet(14/56 Pages) NXP

14 / 56 page

139036

All information provided in this document is subject to legal disclaimers.

Product data sheet

COMPANY PUBLIC

Rev. 3.6 — 10 March 2011

139036

14 of 56

NXP Semiconductors

SL3ICS1002/1202

UCODE G2XM and G2XL

8. Mechanical specification

8.1 Wafer specification

See Ref. 20 “Data sheet - Delivery type description – General specification for 8” wafer on

UV-tape with electronic fail die marking, BL-ID document number: 1093**”.

8.1.1 Wafer

• Designation:

each wafer is scribed with batch number and

wafer number

• Diameter:

200 mm (8”)

• Thickness:

150

μm ± 15 μm

• Number of pads

• Pad location:

non diagonal/ placed in chip corners

• Distance pad to pad RFN-RFP

333.0 µm

• Distance pad to pad TP1-RFN:

351.0 µm

• Process:

CMOS 0.14 µm

• Batch size:

25 wafers

• Dies per wafer:

120.000

8.1.2 Wafer backside

• Material:

• Treatment:

ground and stress release

• Roughness:

Ra max. 0.5 μm, Rt max. 5 μm

8.1.3 Chip dimensions

• Die size without scribe:

0.414 mm x 0.432 mm = 0.178 mm2

• Scribe line width:

x-dimension:56.4

μm (width is measured on top metal layer)

y-dimension:56.4

μm (width is measured on top metal layer)

8.1.4 Passivation on front

• Type

Sandwich structure

• Material:

PE-Nitride (on top)

• Thickness:

1.75

μm total thickness of passivation

SL3ICS1202 bảng dữ liệu(PDF) 14 Page - NXP Semiconductors

SL3ICS1202 bảng dữ liệu(HTML) 14 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

bảng dữ liệu tải về

Link URL