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SLOU330 bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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SLOU330 bảng dữ liệu(HTML) 1 Page - Texas Instruments |
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1 / 18 page ![]() TSW1200 TSW3100 6V Power Input ADC Input for ChA and ChB DAC Outputs for ChA and ChB IQ Modulator Output LO Input Power Supply Jumpers for LDO/DCDC, iQ Mod and CDCE72010 Clock Inputs USB AUX ADC and DAC User 's Guide SLOU330 – December 2011 EVM Description The AFE722x EVM includes a great level of flexibility to enable the user to test it in a more system like environment. The individual power rails can be generated through LDOs or DC/DC converters from a 6 V power source and the EVM clock architecture allows for external clock input as well as clock generation using a low jitter PLL in combination with a VCXO. On the transmit side the EVM provides the option of connecting directly to the DAC outputs or perform up-conversion via on board IQ modulator. On the digital side the EVM provides a seamless interface to the TSW1200 capture card in order to evaluate received data directly on a PC. The TSW3100 pattern generation card can be used to provide data to the dual DAC of the AFE722x and the on board CDCE72010 generates the appropriate clock for the TSW3100 for synchronous operation. Both AFE722x and CDCE72010 can be programmed via SPI conveniently through the USB connection. 1 SLOU330 – December 2011 EVM Description Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated |
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