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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DLPC100ZCT bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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DLPC100ZCT bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 25 page  DLPC100 DLPS019B – DECEMBER 2009 – REVISED DECEMBER 2010 www.ti.com TERMINAL FUNCTIONS TERMINAL I/O CLOCK DESCRIPTION TYPE SYSTEM NAME NO. CFG_DATA H2 I1 CFG_DCLK Data input from DLPR100 device CFG_DCLK H1 O1 CFG_DCLK DLPR100 data clock CFG_ASDO Serial data output. This pin sends address and control C1 O1 CFG_DCLK information to the DLPR100 during configuration. MSEL_2 G12 I1 Asynch Mode selection signals. (Must be tied low for proper operation) MSEL_1 H12 I1 Asynch Mode selection signals. (Must be tied high for proper operation) MSEL_0 H13 I1 Asynch Mode selection signals. (Must be tied low for proper operation) CE J3 I1 Asynch Configuration chip enable. Active low. CFG Configuration control. Configuration will start when a low to high H5 I1 Asynch transition is detected at this pin. NSTATUS F4 B1 CFG_DCLK Configuration status pin. CFG_DONE Configuration Done status pin. Signal goes high at the end of H14 B1 CFG_DCLK configuration. Board Level Test & Debug JTAG_TDI H4 I2 JTAG_TCK JTAG, serial data in JTAG_TCK H3 I3 N/A JTAG, serial data clock JTAG_TMS J5 I2 JTAG_TCK JTAG, test mode select JTAG_TDO J4 O1 JTAG_TCK JTAG, serial data out System Interfaces CLK_IN E16 I4 N/A Input oscillator clock (60 MHz) RESET L8 I5 Async Device reset (active low) PWRGOOD T3 I5 Async System power good indicator P_SCL R3 B2 N/A I2C clock P_SDA L3 B2 N/A I2C data I2C_ADDR_SEL R9 I4 Async I2C address selection (low = device address x36) Reserved M16 I4 Async Reserved. Must be tied to GND for DLPC100. Reserved G15 I4 Async Not used. Pin reserved for future use. Test/Debug Interfaces SpareIn_B8 B8 SpareIn_B9 B9 SpareIn_E1 E1 SpareIn_E15 E15 SpareIn_E2 E2 I1,4,5 N/A Reserved. Should be tied to GND to minimize power. SpareIn_M1 M1 SpareIn_M15 M15 SpareIn_M2 M2 SpareIn_A9 A9 SpareIn_T9 T9 4 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): DLPC100 |
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