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DAC5675MPHPREP bảng dữ liệu(PDF) 10 Page - Texas Instruments

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DAC5675MPHPREP bảng dữ liệu(HTML) 10 Page - Texas Instruments

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DAC5675-EP
SGLS381A – OCTOBER 2006 – REVISED OCTOBER 2006
DEVICE INFORMATION (continued)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
AGND
19, 41, 46, 47
I
Analog negative supply voltage (ground). Pin 47 is internally connected to the heat slug.
AVDD
20, 42, 45, 48
I
Analog positive supply voltage
BIASJ
39
O
Full-scale output current bias
CLK
22
I
External clock input
CLKC
21
I
Complementary external clock
1, 3, 5, 7, 9,
LVDS positive input, data bits 13–0.
11, 13, 23, 25,
D[13:0]A
I
D13A is the most significant data bit (MSB).
27, 29, 31, 33,
D0A is the least significant data bit (LSB).
35
2, 4, 6, 8, 10,
LVDS negative input, data bits 13–0..
12, 14, 24, 26,
D[13:0]B
I
D13B is the most significant data bit (MSB).
28, 30, 32, 34,
D0B is the least significant data bit (LSB).
36
DGND
16, 18
I
Digital negative supply voltage (ground)
DVDD
15, 17
I
Digital positive supply voltage
Internal reference output or external reference input. Requires a 0.1-
µF decoupling capacitor to
EXTIO
40
I/O
AGND when used as reference output.
DAC current output. Full-scale when all input bits are set 1. Connect the reference side of the
IOUT1
43
O
DAC load resistors to AVDD.
DAC complementary current output. Full-scale when all input bits are 0. Connect the reference
IOUT2
44
O
side of the DAC load resistors to AVDD.
NC
38
Not connected in chip. Can be high or low.
SLEEP
37
I
Asynchronous hardware power-down input. Active high. Internal pulldown.
10
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