LTM4613 datasheet(14/20 Pages) LINER

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LTM8048

8048fa

APPLICATIONS INFORMATION

A few rules to keep in mind are:

1. Place the RADJ1 and RADJ2 resistors as close as possible

to their respective pins.

2. Place the CIN capacitor as close as possible to the VIN

and GND connections of the LTM8048.

3. Place the COUT1 capacitor as close as possible to VOUT1

and VOUT–. Likewise, place the COUT2 capacitor as close

as possible to VOUT2 and VOUT–.

4. Place the CIN and COUT capacitors such that their

ground current flow directly adjacent or underneath

the LTM8048.

5. Connect all of the GND connections to as large a copper

pour or plane area as possible on the top layer. Avoid

breaking the ground connection between the external

components and the LTM8048.

6. Use vias to connect the GND copper area to the board’s

internal ground planes. Liberally distribute these GND

vias to provide both a good ground connection and

thermal path to the internal planes of the printed circuit

board. Pay attention to the location and density of the

thermal vias in Figure 1. The LTM8048 can benefit from

the heat sinking afforded by vias that connect to internal

GND planes at these locations, due to their proximity

to internal power handling components. The optimum

number of thermal vias depends upon the printed

circuit board design. For example, a board might use

very small via holes. It should employ more thermal

vias than a board that uses larger holes.

Hot-Plugging Safely

The small size, robustness and low impedance of ceramic

capacitors make them an attractive option for the input

bypass capacitor of the LTM8048. However, these capaci-

tors can cause problems if the LTM8048 is plugged into a

live supply (see Linear Technology Application Note 88 for

a complete discussion). The low loss ceramic capacitor

combined with stray inductance in series with the power

source forms an underdamped tank circuit, and the volt-

age at the VIN pin of the LTM8048 can ring to more than

twice the nominal input voltage, possibly exceeding the

LTM8048’s rating and damaging the part. A similar phe-

nomenon can occur inside the LTM8048 module, at the

output of the integrated EMI filter, with the same potential

of damaging the part. If the input supply is poorly con-

trolled or the user will be plugging the LTM8048 into an

energized supply, the input network should be designed

to prevent this overshoot. This can be accomplished by

installing a small resistor in series to VIN, but the most

popular method of controlling input voltage overshoot is

adding an electrolytic bulk capacitor to the VIN or fIN net.

This capacitor’s relatively high equivalent series resistance

damps the circuit and eliminates the voltage overshoot.

The extra capacitor improves low frequency ripple filter-

ing and can slightly improve the efficiency of the circuit,

though it can be a large component in the circuit.

Thermal Considerations

The LTM8048 output current may need to be derated if it

is required to operate in a high ambient temperature. The

amount of current derating is dependent upon the input

voltage, output power and ambient temperature. The

temperature rise curves given in the Typical Performance

Characteristics section can be used as a guide. These curves

were generated by the LTM8048 mounted to a 58cm2

4-layer FR4 printed circuit board. Boards of other sizes

and layer count can exhibit different thermal behavior, so

it is incumbent upon the user to verify proper operation

over the intended system’s line, load and environmental

operating conditions.

For increased accuracy and fidelity to the actual application,

many designers use FEA to predict thermal performance.

To that end, the Pin Configuration section of the data sheet

typically gives four thermal coefficients:

θJA: Thermal resistance from junction to ambient

θJCbottom: Thermal resistance from junction to the bot-

tom of the product case

θJCtop: Thermal resistance from junction to top of the

product case

θJCboard:Thermalresistancefromjunctiontotheprinted

circuit board.

While the meaning of each of these coefficients may seem

to be intuitive, JEDEC has defined each to avoid confu-

sion and inconsistency. These definitions are given in

JESD 51-12, and are quoted or paraphrased as follows:

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