DC to DC Synchronous Converter Design

Abdus Sattar, IXYS Corporation

IXAN0068

3

Figure 3: Ideal Circuit waveforms (with no dead time)

The Switching Period,

off

on

S

T

T

T

+

=

, the Switching frequency,

S

S

T

f

1

=

The duty cycle,

off

on

on

S

on

T

T

T

T

T

D

+

=

=

, Turn-on time,

S

on

DT

T

=

Turn-off time,

S

off

T

D

T

)

1

(

−

=

.

Figure 4: Ideal synchronous buck converter inductor current

An output DC voltage with lowest ripple is considered the best solution. Ripple appears

in the output voltage as the L1 current’s ripple component,

)

(

I

L

Δ

, which charges and

discharges the output capacitor, C1, as shown in Figure 4. C1 is charged during the