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Ballast Demonstrator User Guide

-7

7629A–AVR–04/06

Section 3

Ballast Description

3.1

Circuit Topology

• Line conditioning with input filter and varistor for noise suppression and protection.

• Low Voltage supply

• PFC / boost regulator

• PFC magnetics

• Lamp drive

• Microprocessor control

• Charge pump regulator

• ½ bridge driver

• ½ bridge power MOSFET stage for up to 2 lamps

3.1.1

Line Conditioning

An input filter section consisting of C1, C3, and common mode choke L1 prevent switch-

ing signal frequencies and their harmonics from the PFC boost converter from being

conducted to the mains. Varistor RV1 protects the ballast circuit from line voltage tran-

sients. Full wave bridge rectifier BR1 converts the line AC to a DC haversine. Diode D2

is used to provide a point ahead of the boost inductor and filter where the haversine sig-

nal can be sensed by the microcontroller. This is necessary for the proper timing of the

PFC control drive signal which must maintain a constant ON time pulse width over a

haversine period.

3.1.2

Low Voltage Supply

3.3V microcontroller power and ~ 15V FET drive power are provided by the low voltage

supply consisting of a current source (Q1) and multipurpose IC U1 (IXI589). Internal to

U1 are a 3.3V linear regulator, a 15V (nominal) two point regulator, under-voltage lock-

out comparators and control, charge pump switching circuitry, and a FET driver. (See

more detailed description of the IXI859 below) For startup, the current source formed by

Q1, and its associated components sources current into C6 until the voltage at U1 pin 1

reaches the under-voltage lockout upper limit of approximately 14.1V. The current

source voltage output is limited by zener diode D3 to about 16 V. When the under-volt-

age lockout limit is reached, the IXI859 begins to supply 3.3V to the microcontroller. The

microcontroller then begins to supply drive pulses to the PFC FET Q3 through the

IXI859 FET gate driver. The charge pump regulator circuit is then able to supply 15V

power by efficiently converting energy from the PFC switching circuit. This feature is not

used in the non-dimmable demonstrator design. Rather, a voltage doubler circuit con-

sisting of D4, D20 and C31 connected to the PFC transformer secondary provides 15V

power after startup.

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