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R5F5630ACDFB bảng dữ liệu(PDF) 74 Page - Renesas Technology Corp |
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R5F5630ACDFB bảng dữ liệu(HTML) 74 Page - Renesas Technology Corp |
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74 / 165 page ![]() R01DS0060EJ0100 Rev.1.00 Page 74 of 168 Sep 13, 2011 RX630 Group 3. Address Space 3.2 External Address Space The external address space is divided into up to eight CS areas (CS0 to CS7), each corresponding to the CSn# signal output from a CSn# (n = 0 to 7) pin. Figure 3.2 shows the address ranges corresponding to the individual CS areas (CS0 to CS7) in on-chip ROM disabled extended mode. Figure 3.2 Correspondence between External Address Spaces and CS Areas (In On-Chip ROM Disabled Extended Mode) CS7 (16 Mbytes) CS6 (16 Mbytes) CS5 (16 Mbytes) CS4 (16 Mbytes) CS3 (16 Mbytes) CS2 (16 Mbytes) CS1 (16 Mbytes) CS0 (16 Mbytes) On-chip RAM External address space (CS area) Reserved area*1 Peripheral I/O registers Reserved area*1 Reserved area*1 External address space*2 0000 0000h 0008 0000h 0010 0000h 0100 0000h 0800 0000h FF00 0000h 0002 0000h 0100 0000h 0200 0000h 0300 0000h 0400 0000h 0500 0000h 0600 0000h 0700 0000h 01FF FFFFh 02FF FFFFh 03FF FFFFh 04FF FFFFh 05FF FFFFh 06FF FFFFh 07FF FFFFh FFFF FFFFh FFFF FFFFh FF00 0000h Note 1. Reserved areas should not be accessed. Note 2. The CS0 area is disabled in on-chip ROM enabled extended mode. In this mode, the address space for addresses above 0800 0000h is as shown in figure on this section, Memory Map in Each Operating Mode. |
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