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LIS35DETR bảng dữ liệu(PDF) 27 Page - STMicroelectronics

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LIS35DETR bảng dữ liệu(HTML) 27 Page - STMicroelectronics

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LIS35DE
Register description
Doc ID 15594 Rev 1
27/39
7.3
CTRL_REG3 [interrupt CTRL register] (22h)
7.4
HP_FILTER_RESET (23h)
Dummy register. Reading at this address zeroes instantaneously the content of the internal
high pass-filter. If the high pass filter is enabled all three axes are instantaneously set to 0g.
This allows to overcome the settling time of the high pass filter.
10
0.5
2
11
0.25
1
Table 21.
High pass filter cut-off frequency configuration (continued)
HP_coeff2,1
ft (Hz)
(DR=100 Hz)
ft (Hz)
(DR=400 Hz)
Table 22.
CTRL_REG3 [interrupt CTRL register] (22h) register
IHL
PP_OD
I2CFG2
I2CFG1
I2CFG0
I1CFG2
I1CFG1
I1CFG0
Table 23.
CTRL_REG3 [interrupt CTRL register] (22h) register description
IHL
Interrupt active high, low. Default value 0.
(0: active high; 1: active low)
PP_OD
Push-pull/Open Drain selection on interrupt pad. Default value 0.
(0: push-pull; 1: open drain)
I2CFG2
I2CFG1
I2CFG0
Data Signal on Int2 pad control bits. Default value 000.
(see table below)
I1CFG2
I1CFG1
I1CFG0
Data Signal on Int1 pad control bits. Default value 000.
(see table below)
Table 24.
Data signal on Int pad control bits
I1(2)_CFG2
I1(2)_CFG1
I1(2)_CFG0
Int1(2) pad
0
0
0
GND
001
FF_WU_1
010
FF_WU_2
0
1
1
FF_WU_1 OR FF_WU_2
1
0
0
Data Ready
1
1
1
Click interrupt



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