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GS9062-CFE3 bảng dữ liệu(PDF) 34 Page - Gennum Corporation |
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GS9062-CFE3 bảng dữ liệu(HTML) 34 Page - Gennum Corporation |
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34 / 46 page ![]() GS9062 Data Sheet 22209 - 7 February 2007 34 of 46 3.6.3.4 Ancillary Data Checksum Generation and Insertion The GS9062 will calculate checksums for all detected ancillary data packets presented to the device. These calculated checksum values are inserted into the data stream prior to serialization. Ancillary data checksum generation and insertion will only take place if the ANC_CSUM_INS bit of the IOPROC_DISABLE register is set LOW. 3.6.3.5 TRS Generation and Insertion The GS9062 can generate and insert 10-bit TRS code words into the data stream as required. This feature is enabled by setting the TRS_INS bit of the IOPROC_DISABLE register LOW. TRS word generation will be performed in accordance with the timing parameters generated by the flywheel which will be locked either to the received TRS ID words or the supplied H, V, and F timing signals Internal Flywheel on page 23. 3.7 Parallel-To-Serial Conversion The parallel data output of the internal data processing blocks is fed to the parallel-to-serial converter. The function of this block is to generate a serial data stream from the 10-bit or 20-bit parallel data words and pass the stream to the integrated cable driver. 2 AP-IDH Active Picture Internal device error Detected Here flag will be generated and inserted when IOPROC_EN/DIS and SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is LOW. R/W 0 1 AP-EDA Active Picture Error Detected Already flag will be generated and inserted when IOPROC_EN/DIS and SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is LOW. R/W 0 0 AP-EDH Active Picture Error Detected Here flag will be generated and inserted when IOPROC_EN/DIS and SMPTE_BYPASS pins are HIGH and EDH_CRC_INS bit is LOW. R/W 0 Table 3-9: Host Interface Description for EDH Flag Register (Continued) Register Name Bit Name Description R/W Default |
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