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PCF85134 bảng dữ liệu(PDF) 7 Page - NXP Semiconductors

tên linh kiện PCF85134
Giải thích chi tiết về linh kiện  Universal LCD driver for low multiplex rates
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PCF85134_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 17 December 2009
7 of 40
NXP Semiconductors
PCF85134
Universal LCD driver for low multiplex rates
• The I2C-bus interface is initialized
• The data pointer and the subaddress counter are cleared (set to logic 0)
• The display is disabled
Remark: Do not transfer data on the I2C-bus for at least 1 ms after a power-on to allow the
reset action to complete.
7.2 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider of three
series resistors connected between pins VLCD and VSS. The center resistor is bypassed
by switch if the 1
⁄
2 bias voltage level for the 1:2 multiplex drive mode configuration is
selected.
7.3 LCD voltage selector
The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the
selected LCD drive configuration. The operation of the voltage selector is controlled by the
mode-set command (see Table 10) from the command decoder. The biasing
configurations that apply to the preferred modes of operation, together with the biasing
characteristics as functions of VLCD and the resulting discrimination ratios (D) are given in
Table 5.
A practical value for VLCD is determined by equating Voff(RMS) with a defined LCD
threshold voltage (Vth), typically when the LCD exhibits approximately 10 % contrast. In
the static drive mode a suitable choice is VLCD >3Vth.
Multiplex drive modes of 1:3 and 1:4 with 1
⁄2 bias are possible but the discrimination and
hence the contrast ratios are smaller.
Bias is calculated by
, where the values for a are
a = 1 for 1
⁄2 bias
a = 2 for 1
⁄3 bias
The RMS on-state voltage (Von(RMS)) for the LCD is calculated with Equation 1:
(1)
Table 5.
Biasing characteristics
LCD drive
mode
Number of:
LCD bias
configuration
Backplanes
Levels
static
1
2
static
0
1
∞
1:2 multiplex
2
3
1
⁄
2
0.354
0.791
2.236
1:2 multiplex
2
4
1
⁄
3
0.333
0.745
2.236
1:3 multiplex
3
4
1
⁄
3
0.333
0.638
1.915
1:4 multiplex
4
4
1
⁄
3
0.333
0.577
1.732
V
off RMS
()
V
LCD
--------------------------
V
on RMS
()
V
LCD
-------------------------
D
V
on RMS
()
V
off RMS
()
--------------------------
=
1
1a
+
-------------
V
on RMS
()
a2
2a
n
++
n
1a
+
()
2
×
------------------------------
V
LCD
=



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