PCA9621

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© NXP B.V. 2011. All rights reserved.

Product data sheet

Rev. 1 — 9 March 2011

6 of 18

NXP Semiconductors

PCA9621

65 mA 8-bit 2-wire bus output port

8.

Bus transaction

transaction, the output ports (P0 to P7) of the PCA9621 are updated upon receipt of the

STOP condition.

A typical read transaction is shown in Figure 7.

9.

Limiting values

[1]

[2]

100 mA for one pin only in the group P0 to P3, and one pin only in the group P4 to P7. Otherwise 70 mA maximum, any pin.

Fig 6.

PCA9621 write transaction to Control register

Fig 7.

PCA9621 read transaction from Control register

002aaf385

S

1

1

0

0

A2

A1

A0

slave address

0

A

P7

P6

P5

P4

P3

P2

P1

P0

A

P

Control register

START

condition

R/W

acknowledge

from slave

acknowledge

from slave

STOP

condition

002aaf386

S

1

1

0

0

A2

A1

A0

slave address

1

A

P7

P6

P5

P4

P3

P2

P1

P0

NA

P

Control register

START

condition

R/W

acknowledge

from slave

not acknowledge

from master

STOP

condition

Table 3.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

supply voltage

[1]

−0.3

+7

V

voltage on any other pin

V

input current

output ports (P0 to P7)

[2] -100

mA

SDA, SCL pins

-

40

mA

address pins A0 to A2; RESET pin

-

20

mA

ground supply current

-

550

mA

total power dissipation

-

300

mW

storage temperature

−55

+125

°C

ambient temperature

operating

−40

+85

°C