công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

MPC5673K bảng dữ liệu(PDF) 111 Page - Freescale Semiconductor, Inc

tên linh kiện MPC5673K
Giải thích chi tiết về linh kiện  Microcontroller is a 32-bit embedded controller designed for advanced
PDF  140 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  FREESCALE [Freescale Semiconductor, Inc]
Trang chủ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5673K bảng dữ liệu(HTML) 111 Page - Freescale Semiconductor, Inc

Back Button MPC5673K Datasheet HTML 107Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 108Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 109Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 110Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 111Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 112Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 113Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 114Page - Freescale Semiconductor, Inc MPC5673K Datasheet HTML 115Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 111 / 140 page
background image
Electrical characteristics
MPC5675K Microcontroller Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
111
Figure 31 shows the DDR SDRAM write timing.
Figure 31. DDR write timing
Figure 32 and Figure 33 show the DDR SDRAM read timing.
Figure 32. DDR read timing, DQ vs. DQS
14
tDQSQ
CC DQS-DQ skew for DQS and associated DQ inputs2 –(tCK/4 – 600) (tCK/4–600) ps
15
tDQSEN
CC DQS window start position related to CAS read
command1, 2, 3, 4, 5
TBD
TBD
ps
NOTES:
1 Measured with clock pin loaded with differential 100 ohm termination resistor.
2 All transitions measured at mid-supply (V
DD_MEM_IO/2).
3 Measured with all outputs except the clock loaded with 50 ohm termination resistor to V
DD_MEM_IO/2.
4 In this window, the first rising edge of DQS should occur. From the start of the window to DQS rising edge, DQS
should be low.
5 Window position is given for t
DQSEN = 2.0 tCK. For other values of tDQSEN, window position is shifted accordingly.
Table 61. DDR and DDR2 (DDR2-400) SDRAM timing specifications (continued)
At recommended operating conditions with VDD_MEM_IO of 5%
No.
Symbol
Parameter
Min
Max
Unit
MCK
tCH
tCL
DQS
tDQSS
DQ, DM (out)
tDS
tDH
tCK
DQS (in)
Any DQ (in)
tDQSQ
tDQSQ



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com