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MPC5602DPB bảng dữ liệu(PDF) 6 Page - Freescale Semiconductor, Inc |
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MPC5602DPB bảng dữ liệu(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 27 page ![]() MPC5602D Microcontroller Product Brief, Rev. 3.1 Preliminary—Subject to Change Without Notice Device family overview Freescale Semiconductor 6 3 Device family overview This section provides a comparison of the different MPC5602D family members, presents the critical performance parameters, and lists both the chip-level and module features as well as the available packages. 3.1 MPC5602D family comparison Table 2 provides a summary of the different members of the MPC5602D family and their proposed features. This information is intended to provide an understanding of the range of functionality offered by this family. Real-time counter (RTC) Provides a free-running counter and interrupt generation capability that can be used for timekeeping applications Reset generation module (MC_RGM) Centralizes reset sources and manages the device reset sequence of the device Static random-access memory (SRAM) Provides storage for program code, constants, and variables System integration unit lite (SIUL) Provides control over all the electrical pad controls and up 32 ports with 16 bits of bidirectional, general-purpose input and output signals and supports up to 32 external interrupts with trigger event configuration System status and configuration module (SSCM) Provides system configuration and status data (such as memory size and status, device mode and security status), device identification data, debug status port enable and selection, and bus and peripheral abort enable/disable System timer module (STM) Provides a set of output compare events to support AUTOSAR and operating system tasks System watchdog timer (SWT) Provides protection from runaway code Wakeup unit (WKPU) Supports up to 18 external sources that can generate interrupts or wakeup events, of which 1 can cause non-maskable interrupt requests or wakeup events. Table 2. MPC5602D device comparison Feature Device MPC5601DxLH MPC5601DxLL MPC5602DxLH MPC5602DxLL CPU e200z0 Execution speed Static – up to 48 MHz Code Flash 128 KB 256 KB Data Flash 64 KB (4 × 16 KB) SRAM 12 KB 16 KB eDMA 16 ch Table 1. MPC5602D series block summary (continued) Block Function |
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