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DSPIC30F2010 bảng dữ liệu(PDF) 54 Page - Microchip Technology |
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DSPIC30F2010 bảng dữ liệu(HTML) 54 Page - Microchip Technology |
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54 / 202 page ![]() dsPIC30F2010 DS70118J-page 54 © 2011 Microchip Technology Inc. 8.2 Configuring Analog Port Pins The use of the ADPCFG and TRIS registers control the operation of the A/D port pins. The port pins that are desired as analog inputs must have their correspond- ing TRIS bit set (input). If the TRIS bit is cleared (out- put), the digital output level (VOH or VOL) will be converted. When reading the PORT register, all pins configured as analog input channel will read as cleared (a low level). Pins configured as digital inputs will not convert an ana- log input. Analog levels on any pin that is defined as a digital input (including the ANx pins), may cause the input buffer to consume current that exceeds the device specifications. 8.2.1 I/O PORT WRITE/READ TIMING One instruction cycle is required between a port direction change or port write operation and a read operation of the same port. Typically this instruction would be a NOP. EXAMPLE 8-1: PORT WRITE/READ EXAMPLE 8.3 Input Change Notification Module The Input Change Notification module provides the dsPIC30F devices the ability to generate interrupt requests to the processor in response to a change-of- state on selected input pins. This module is capable of detecting input change-of-states even in Sleep mode, when the clocks are disabled. There are up to 22 exter- nal signals (CN0 through CN21) that may be selected (enabled) for generating an interrupt request on a change-of-state. MOV 0xFF00, W0 ; Configure PORTB<15:8> ; as inputs MOV W0, TRISBB ; and PORTB<7:0> as outputs NOP ; Delay 1 cycle btss PORTB, #13 ; Next Instruction |
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