ADC1413D datasheet(13/43 Pages) NXP

tên linh kiện	ADC1413D

Giải thích chi tiết về linh kiện	Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps serial JESD204A interface

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ADC1413D_SER

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 9 February 2011

13 of 43

NXP Semiconductors

ADC1413D series

Dual 14-bit ADC; serial JESD204A interface

10.4 SPI timing

[1]

Typical values measured at VDDA =3 V, VDDD =1.8 V, Tamb =25 C. Minimum and maximum values are

across the full temperature range Tamb = 40 C to +85 C at VDDA =3V, VDDD = 1.8 V; VI (INAP,

INBP)

 V

I (INAM,INBM) = 1 dBFS; internal reference mode; 100  differential applied to serial outputs;

unless otherwise specified.

Table 8.

SPI timing characteristics[1]

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tw(SCLK)

SCLK pulse width

tw(SCLKH)

SCLK HIGH pulse

width

-16

tw(SCLKL)

SCLK LOW pulse

width

-16

tsu

set-up time

data to SCLKH

CS to SCLKH

hold time

data to SCLKH

CS to SCLKH

fclk(max)

maximum clock

frequency

-25

MHz

Fig 5.

SPI timing

tsu

SDIO

SCLK

R/W

A12

A11

tsu

tw(SCLK)

005aaa065

tw(SCLKL)

tw(SCLKH)

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