MPC5673F datasheet(27/132 Pages) FREESCALE

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Electrical Characteristics

MPC5674F Microcontroller Data Sheet, Rev. 6

Freescale Semiconductor

—

Untrimmed VRC 1.2V output variation before band

gap trim (unloaded)

Note: Voltage should be higher than maximum

VLVD12 to avoid LVD event

VDD12OUT – 8% VDD12OUT VDD12OUT + 10%

—

Trimmed VRC 1.2V output variation after band gap

trim (REGCTL load max. 20mA, VDD load max.

1A)1

VDD12OUT – 5% VDD12OUT VDD12OUT + 10%

VSTEPV12

Trimming step VDD12OUT

—10

—

3VPORC

POR rising VDD 1.2V

—

0.7

—

POR VDD 1.2V variation

VPORC – 30%

VPORC

VPORC + 30%

—

POR 1.2V hysteresis

—

4VLVD12

Nominal rising LVD 1.2V

Note: ~VDD12OUT × 0.87

—1.100

—

Untrimmed LVD 1.2V variation before band gap trim

Note: Rising VDD

VLVD12 – 6%

VLVD12

VLVD12 + 6%

—

Trimmed LVD 1.2V variation after band gap trim

Rising VDD

VLVD12 – 3%

VLVD12

VLVD12 + 3%

—

LVD 1.2V Hysteresis

VLVDSTEP12

Trimming step LVD 1.2V

—

5IREGCTL

VRC DC current output on REGCTL

—

Voltage regulator 1.2V current consumption

VDDREG

—3

—

7VDD33OUT

Nominal VREG 3.3V output

—

3.3

—

Untrimmed VREG 3.3V output variation before band

gap trim (unloaded)

Note: Rising VDDSYN

VDD33OUT – 6% VDD33OUT VDD33OUT + 10%

—

Trimmed VREG 3.3V output variation after band gap

trim (max. load 80mA)

VDD33OUT – 5% VDD33OUT VDD33OUT + 10%

VSTEPV33

Trimming step VDDSYN

—

8VLVD33

Nominal rising LVD 3.3V

Note: ~VDD33OUT × 0.872

—2.950

—

Untrimmed LVD 3.3V variation before band gap trim

Note: Rising VDDSYN

VLVD33 – 5%

VLVD33

VLVD33 + 5%

—

Trimmed LVD 3.3V variation after bad gap trim

Note: Rising VDDSYN

VLVD33 – 3%

VLVD33

VLVD33 + 3%

—

LVD 3.3V Hysteresis

—

VLVDSTEP33

Trimming step LVD 3.3V

—

Table 11. PMC Electrical Specifications (continued)

Name

Parameter

Min

Typ

Max

Unit

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